One of the primary steps in the fabrication of modern semiconductor devices is the formation of a film, such as a silicon oxide, on a semiconductor substrate. Silicon oxide is widely used as an insulating layer in the manufacture of semiconductor devices. As is well known, a silicon oxide film can be deposited by thermal chemical vapor deposition (CVD) or a plasma chemical vapor deposition processes among other techniques. In a conventional thermal CVD process, reactive gases are supplied to the substrate surface where heat-induced chemical reactions (homogeneous or heterogeneous) take place to produce a desired film. In a conventional plasma process, a controlled plasma is formed to decompose and/or energize reactive species to produce the desired film.
Semiconductor device geometries have dramatically decreased in size since such devices were first introduced several decades ago. Smaller feature sizes have resulted in the presence of increased aspect ratio gaps for some applications, for example, between adjacent conductive lines or in etched trenches. The aspect ratio of a gap is defined by the ratio of the gap's height or depth to its width. These spaces are difficult to fill using conventional CVD methods. A film's ability to completely fill such gaps is referred to as the film's “gap-filling” ability. Silicon oxide is one type of insulation film that is commonly used to fill the gaps in intermetal dielectric (IMD) applications, premetal dielectric (PMD) applications and shallow trench isolation (STI) applications among others. Such a silicon oxide film is often referred to as a gap-fill film or a gap-fill layer.
Some integrated circuit manufacturers have turned to the use of high density plasma CVD (HDP-CVD) systems to deposit silicon oxide gap-fill layers. HDP-CVD systems form a plasma that is approximately two orders of magnitude or greater than the density of a standard, capacitively-coupled plasma CVD system. Examples of HDP-CVD systems include inductively-coupled plasma systems and electron cyclotron resonance (ECR) plasma systems among others. HDP-CVD systems generally operate at lower pressure ranges than low density plasma systems. The low chamber pressure employed in HDP-CVD systems provides active species having a long mean-free-path and reduced angular distribution. These factors, in combination with the plasma's density, contribute to a significant number of constituents from the plasma reaching even the deepest portions of closely spaced gaps, providing a film with improved gap-fill capabilities as compared to films deposited in a low density plasma CVD system.
Another factor that allows films deposited by HDP-CVD techniques to have improved gap-fill characteristics as compared to films deposited by other CVD techniques is the occurrence of sputtering, promoted by the plasma's high density, simultaneous with film deposition. The sputtering element of HDP deposition slows deposition on certain features, such as the corners of raised surfaces, thereby contributing to the increased gap-fill ability of HDP deposited films. Some HDP-CVD systems introduce argon or a similar heavy inert gas to further promote the sputtering effect. These HDP-CVD systems typically employ an electrode within the substrate support pedestal that enables the creation of an electric field to bias the plasma toward the substrate. The electric field can be applied throughout the HDP deposition process to generate sputtering and provide better gap-fill characteristics for a given film.
One HDP-CVD process commonly used to deposit a silicon oxide film forms a plasma from a process gas that includes silane (SiH4), molecular oxygen (O2) and argon (Ar). This silicon oxide film has improved gap-fill characteristics as opposed to some silicon oxide films deposited by other non-HDP-CVD plasma techniques and is useful for a variety of applications. Despite the improvement in gap-fill capability provided by HDP-CVD systems and the relatively good gap-fill characteristics of HDP-CVD silicon oxide films in particular, the development of film deposition techniques that enable the deposition of silicon oxide layers having even further improved gap-fill characteristics are desirable. Such improved silicon oxide film deposition are particularly desirable in light of the aggressive gap-fill challenges presented by integrated circuit designs employing minimum feature sizes of 0.18 microns and less.
One known way to improve the gap-fill capability of silicon oxide films is to add a fluorine-containing source gas to the process gas. Fluorine atoms are known to etch silicon oxide and it is known that the inclusion of fluorine into a silicon oxide deposition process results in etching simultaneous with deposition which in turn can improve the deposited film's gap-fill capability. The incorporation of fluorine into a silicon oxide film also has a primary benefit of reducing the dielectric constant of the deposited film. A silicon oxide film (also referred to as a silicate glass layer) that includes fluorine is often referred to in the industry as a fluorine-doped silicon oxide film or as a fluorosilicate glass (FSG) layer.
It is also known that the dielectric constant of an FSG layer is generally related to the amount of fluorine incorporated into the film. Higher fluorine concentrations result in a lower dielectric constant and lower fluorine concentrations a higher dielectric constant. If fluorine concentrations become too high, however, stability issues may arise. Generally, FSG films having sufficient stability for integrated circuit applications have a fluorine content of between 4–8 atomic percent and a dielectric constant between 3.3 and 3.6. Undoped silicon oxide films, on the other hand, generally have a dielectric constant in the range of 4.0 and 4.2.
Because of stability and other issues, FSG films are generally not used for PMD or STI applications and have been primarily limited to intermetal dielectric (IMD) applications. Semiconductor manufacturers are often particularly hesitant to include fluorine in PMD and STI layers because such layers are likely to be subject to relatively high temperatures (e.g., above 500° C. and often above 700° C.) either during deposition of the layer or during a process step that is subsequent to deposition of the layer. At such high temperatures, fluorine is more likely to outgas from FSG layers and migrate into an adjacent layer. Thus, many semiconductor manufacturers require that PMD or STI layers have less than 1.0 atomic percent (at. %) fluorine. IMD layers, on the other hand, are typically deposited after the first metal layer and thus never subject temperatures above 450° C.
Typically, undoped silicate glass (USG) or other silicon oxide family members including BPSG (borophosphosilicate glass) and PSG (phosphosilicate glass) are used for PMD layers and USG is used for STI applications. In view of the above, additional methods of depositing PMD and STI silicon oxide films including USG, PSG and BPSG films having improved gap-fill capabilities are desirable.